Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
1998-06-04
2001-05-01
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S412000, C438S413000, C438S592000
Reexamination Certificate
active
06225168
ABSTRACT:
FIELD OF THE INVENTION
The present invention is generally directed to semiconductor devices and, more particularly, to semiconductor devices having a metal gate electrode and a titanium or tantalum nitride gate dielectric barrier layer.
BACKGROUND OF THE INVENTION
Over the last few decades, the electronics industry has undergone a revolution by the use of semiconductor technology to fabricate small, highly integrated electronic devices. The most common semiconductor technology presently used is silicon-based. A large variety of semiconductor devices have been manufactured having various applications in numerous disciplines. One such silicon-based semiconductor device is a metal-oxide-semiconductor (MOS) transistor.
The principal elements of a typical MOS semiconductor device are illustrated in FIG.
1
. The device generally includes a semiconductor substrate
101
on which a gate electrode
103
is disposed. The gate electrode
103
acts as a conductor. An input signal is typically applied to the gate electrode
103
via a gate terminal (not shown). Heavily-doped source/drain regions
105
are formed in the semiconductor substrate
101
and are connected to source/drain terminals (not shown). The source/drain regions
105
may, for example, be lightly-doped drain (LDD) source/drain regions. As illustrated in
FIG. 1
, the typical MOS transistor is symmetrical, which means that the source and drain are interchangeable. Whether a region acts as a source or drain depends on the respective applied voltages and the type of device being made (e.g., PMOS, NMOS, etc.). Thus, as used herein, the term source/drain region refers generally to an active region used for the formation of a source or drain.
A channel region
107
is formed in the semiconductor substrate
101
beneath the gate electrode
103
and separates the source/drain regions
105
. The channel is typically lightly doped with a dopant of a type opposite to that of the source/drain regions
105
. The gate electrode
103
is generally separated from the semiconductor substrate
101
by an insulating layer
109
, typically an oxide layer such as SiO
2
. The insulating layer
109
is provided to prevent current from flowing between the gate electrode
103
and the source/drain regions
105
or channel region
107
.
In operation, an output voltage is typically developed between the source and drain terminals. When an input voltage is applied to the gate electrode
103
, a transverse electric field is set up in the channel region
107
. By varying the transverse electric field, it is possible to modulate the conductance of the channel region
107
between the source region and the drain region. In this manner, an electric field controls the current flow through the channel region
107
. This type of device is commonly referred to as a MOS field-effect-transistor (MOSFET).
Semiconductor devices, like the one described above, are used in large numbers to construct most modern electronic devices. As a larger number of such devices are integrated into a single silicon wafer, improved performance and capabilities of electronic devices can be achieved. Device performance can be further improved by increasing the operating speeds and reliability of the transistors on a device. Accordingly, improvements to transistor structures (e.g., source and drains, gate electrode, gate insulating layer) are continually sought in order to increase the operating speeds and reliability of the transistors.
SUMMARY OF THE INVENTION
The present invention provides semiconductor devices having a metal gate electrode and a titanium or tantalum nitride gate dielectric barrier layer and processes for fabricating such devices. The use of a metal gate electrode along with a titanium or tantalum nitride gate dielectric barrier layer can, for example, provide a highly reliable semiconductor device having an increased operating speed as compared to conventional transistors.
A process of fabricating a semiconductor device, consistent with one embodiment of the invention, includes forming a gate dielectric layer over a substrate; forming a titanium or tantalum nitride barrier layer over the gate dielectric layer; and forming a metal gate electrode over the titanium or tantalum nitride barrier layer. The nitride barrier layer may, for example, have a thickness which is sufficiently thick to inhibit interaction between the metal gate electrode and the gate dielectric layer. The process may further include forming nitrogen bearing spacers adjacent sidewalls of the metal gate electrode such that the spacers and the barrier layer seal the gate dielectric layer against the substrate.
A semiconductor device, in accordance with an embodiment, includes a substrate, a gate dielectric layer disposed over the substrate, a titanium or tantalum nitride barrier layer disposed over the gate dielectric layer, and a metal gate electrode disposed over the Ta/Ti nitride barrier layer. The semiconductor device may further include nitrogen bearing spacers adjacent the gate electrode.
The above summary of the present invention is not intended to describe each illustrated embodiment or every implementation of the present invention. The figures and the detailed description which follow more particularly exemplify these embodiments.
REFERENCES:
patent: 5861676 (1999-01-01), Yen
patent: 6004850 (1999-02-01), Lucas et al.
patent: 6020024 (2000-02-01), Maiti et al.
Fulford H. Jim
Gardner Mark I.
Hause Fred
Kwong Dim-Lee
May Charles E.
Advanced Micro Devices , Inc.
Ghyka Alexander G.
Niebling John F.
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