Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
1999-02-05
2001-05-29
Prenty, Mark V. (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S310000
Reexamination Certificate
active
06239461
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device and a method for manufacturing the same, and more particularly, to a capacitor of a semiconductor device including a dielectric film of high dielectric constant (a high dielectric film) and a method for manufacturing the same.
2. Description of the Related Art
As an integration density of a semiconductor device such as a dynamic random access memory (DRAM) and a ferro-electric RAM (FRAM) increases, a high dielectric constant material such as PbZrTiO
3
(PZT) or BaSrTiO
3
(BST) is required for the dielectric film of a capacitor. Metals of the platinum group and the oxides thereof are mainly used for the conductive film forming a lower electrode or an upper electrode in a capacitor using the high dielectric film. Here, a dry etching for patterning the platinum group metals and the oxide thereof used for the conductive film of the capacitor is difficult. Also, since the platinum group and the oxide thereof reacts with a polysilicon film used as a contact plug, a diffusion barrier layer for preventing the reaction is required between the conductive film and the polysilicon film.
FIG. 1
is a sectional view for describing the capacitor of the semiconductor device according to a conventional technology.
To be specific, an interlayer dielectric film
3
having a contact hole is formed on a semiconductor substrate
1
. A contact plug
5
comprised of the polysilicon film is buried in the contact hole. A diffusion barrier layer
7
connected to the contact plug
5
and comprised of Ta is formed. A first conductive film
9
used as the lower electrode of the capacitor and comprised of Pt is formed on the diffusion barrier layer
7
. A high dielectric film
11
is formed on the overall surface of the semiconductor substrate
1
on which the first conductive material
9
is formed. A second conductive material
13
used as an upper electrode is formed on the overall surface of the semiconductor substrate
1
on which the high dielectric film
11
is formed.
In a conventional capacitor shown in
FIG. 1
, the diffusion barrier layer
7
is formed in order to prevent the reaction between the platinum film of the first conductive film
9
and the contact plug
5
. In the conventional capacitor shown in
FIG. 1
, since the side surfaces of the platinum film of the first conductive film
9
and the diffusion barrier layer
7
are exposed during the deposition of the dielectric film
11
and in a subsequent heat treatment process, the diffusion barrier layer
7
is oxidized and thus becoming Ta
2
O
5
which is a non-conductor. Accordingly, the contact resistance of the first conductive film
9
increases and the first conductive film
9
cannot be used. Also, in the conventional capacitor shown in
FIG. 1
, leakage current increases since the diffusion barrier layer
7
reacts with the high dielectric film
11
.
A method of recessing the contact plug is proposed in order to solve the above problem, which is described with reference to
FIGS. 2 and 3
.
FIGS. 2 and 3
are sectional views showing the capacitors of the semiconductor device according to another conventional technology.
Referring to
FIGS. 2 and 3
, an interlayer dielectric film
23
having a contact hole is formed on a semiconductor substrate
21
. A silicon plug
25
and a diffusion barrier layer
27
comprised of Ta film are sequentially buried in the contact hole. A first conductive film
29
used as the lower electrode of the capacitor and comprised of Pt film is formed on the diffusion barrier layer
27
.
In the conventional capacitor shown in
FIG. 2
, the diffusion barrier layer
27
is formed in a position different from that of the diffusion barrier layer
7
of FIG.
1
. Namely, since the diffusion barrier layer
27
is buried in the contact hole, it is possible to prevent the side surface of the diffusion barrier layer
27
from being exposed.
However, in the conventional capacitor shown in
FIG. 2
, the diffusion path of an oxygen atom is short, and thus the diffusion barrier layer
27
may be oxidized during a subsequent process of forming the high dielectric film.
Furthermore, as shown in
FIG. 3
, when a misalignment occurs during patterning for forming the first conductive film
29
, the diffusion barrier layer
27
is exposed and oxidized during the subsequent process of depositing the high dielectric film and becomes a nonconductor. When the diffusion barrier layer
27
becomes nonconductive, the contact resistance of the conductive film
29
is increased and the production yield of the semiconductor device is deteriorated.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide a capacitor of a semiconductor device in which it is possible to prevent a contact resistance from increasing by preventing the oxidization of a diffusion barrier layer in employing a high dielectric film.
It is another object of the present invention to provide a method for manufacturing the capacitor of the above semiconductor device.
To achieve the first object, a capacitor of a semiconductor device includes a first interlayer dielectric film pattern formed on a semiconductor substrate and having a first contact hole therein and a contact plug buried in the first contact hole and electrically connected to the semiconductor substrate. A diffusion barrier layer pattern is formed on the contact plug, and a first conductive film pattern is formed on the diffusion barrier layer pattern for preventing the oxidization of the diffusion barrier layer pattern. A second interlayer dielectric film pattern having a second contact hole exposing the surface of the first conductive film pattern is formed on the first interlayer dielectric film pattern and the first conductive film pattern. A second conductive film pattern used as the lower electrode of a capacitor is buried in the second contact hole and connected to the first conductive film pattern. A high dielectric film and a third conductive film pattern used as the upper electrode of the capacitor are sequentially formed on the second conductive film pattern.
The diffusion barrier layer pattern can be formed of Ta, Ti, W, Co, Ir, Ru, TaSi, CoSi, TiSi
x
, WSi, TiSiN, TaSiN, IrO
2
, RuO
2
, WN, TiN, TaN, TaAlN, or TiAlN. The first conductive film pattern can be formed of a platinum group metal or a conductive oxide including the platinum group metal. The contact plug can be formed of a polysilicon film, a silicon film, a tungsten film, a tungsten nitride film, or a titanium nitride film.
In accordance with an embodiment of the present invention, a capacitor of a semiconductor device includes a first interlayer dielectric film pattern formed on a semiconductor substrate and having a first contact hole therein and a contact plug buried in the first contact hole and electrically connected to the semiconductor substrate. A diffusion barrier layer pattern is formed on the contact plug, and a first conductive film pattern is formed on the diffusion barrier layer pattern for preventing the oxidization of the diffusion layer pattern. A second interlayer dielectric film pattern having a second contact hole for exposing the surface of the first conductive film pattern is formed on the first interlayer dielectric film pattern and the first conductive film pattern. A second conductive film pattern used as the lower electrode of the capacitor is formed on the inner wall of the second contact hole and on the first conductive film pattern. A high dielectric film and a third conductive film pattern used as the upper electrode are sequentially formed on the second conductive film pattern and the second interlayer dielectric film pattern.
To achieve the second object, a method for manufacturing a capacitor of a semiconductor device includes the step of forming a first interlayer dielectric film pattern having a first contact hole for exposing the surface of a semiconductor substrate on the semiconductor substrate. Then, a contact plug buried in the first contact hole and ele
Heid David W.
Prenty Mark V.
Samsung Electronics Co,. Ltd.
Skjerven Morrill & MacPherson LLP
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