Methods of fabricating an integrated circuit device with...

Details Methods of fabricating an integrated circuit device with... Methods of fabricating an integrated circuit device with...

1999-06-25

2001-05-22

Pham, Long (Department: 2823)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S275000, C438S249000, C438S240000

Reexamination Certificate

active

06235594

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to the field of integrated circuits, and, more particularly, to integrated circuit devices with a dielectric layer.
BACKGROUND OF THE INVENTION
Typically, in a metal oxide semiconductor (MOS) transistor, a thin layer of silicon dioxide is grown in the gate region. The oxide functions as a dielectric whose thickness is chosen specifically to allow induction of a charge in the channel region under the oxide. The gate controls the flow of current through the device. In sub-0.5&mgr;m technologies, ultra-thin gate oxides are used for ultra-large-scale-integration (ULSI, more than 10 million transistors per chip).
Also, highly integrated memory devices, such as dynamic-random-access-memories (DRAMs), require a very thin dielectric film for the data storage capacitor. To meet this requirement, the capacitor dielectric film thickness will be below 2.5 nm of SiO
2
equivalent thickness. Use of a thin layer of a material having a higher relative permittivity, e.g. Ta
2
O
5
, in place of the conventional SiO
2
or Si
3
N
4
layers is useful in achieving desired performance.
A chemical vapor deposited (CVD) Ta
2
O
5
film can be used as a dielectric layer for this purpose, because the dielectric constant of Ta
2
O
5
is approximately three times that of a conventional Si
3
N
4
capacitor dielectric layer. However, one drawback associated with the Ta
2
O
5
dielectric layer is undesired leakage current characteristics. Accordingly, although Ta
2
O
5
material has inherently higher dielectric properties, Ta
2
O
5
typically may produce poor results due to leakage current. For example, U.S. Pat. No. 5,780,115 to Park et al., discloses the use of Ta
2
O
5
as the dielectric for an integrated circuit capacitor with the electrode layer being formed of titanium nitride (TiN). However, at temperatures greater than 600° C., this layered structure has a stability problem because the titanium in the TiN layer tends to reduce the Ta
2
O
5
of the dielectric layer into elemental tantalum.
SUMMARY OF THE INVENTION
In view of the foregoing background, it is therefore an object of the invention to provide a method for producing a low leakage, high quality gate or capacitor dielectric.
This and other objects, features and advantages in accordance with the present invention are provided by a method of fabricating an integrated circuit device including the steps of: forming a tantalum oxide layer adjacent a semiconductor substrate; forming a metal oxide layer on the tantalum oxide layer opposite the semiconductor substrate; and forming a metal nitride layer on the metal oxide layer opposite the tantalum oxide layer. The metal nitride layer includes a metal which may be capable of reducing the tantalum oxide layer, and the metal oxide layer substantially blocks reduction of the tantalum oxide layer by the metal of the metal nitride layer.
The tantalum oxide layer may be formed of tantalum pentoxide, and the metal oxide layer may preferably comprise a titanium dioxide layer. Alternatively, the metal oxide layer may comprise a zirconium dioxide layer, or a ruthenium dioxide layer and preferably has a dielectric constant greater than about 25. The metal nitride layer may be formed of a titanium nitride.
The method may include the step of forming a channel region in a silicon substrate, and the step of forming a silicon oxide layer between the substrate and the tantalum oxide layer. Furthermore, the method may include the step of forming a substantially stress-free interface between the substrate and the silicon oxide layer. Such a step may preferably include annealing the silicon oxide layer and the substrate in an oxidizing atmosphere.
Additionally, a conductive layer, such as a metal layer, may be formed between the substrate and the tantalum oxide layer to define a capacitor with the metal nitride layer. Such a capacitor is preferably formed with a silicon oxide layer between the conductive layer and the tantalum oxide layer and an insulating layer between the substrate and the conductive layer.


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patent: 5508221 (1996-04-01), Kamiyama
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Patent Abstracts of Japan, vol. 017, No. 625, Nov. 18, 1993 and JP 05 198743A (Mitsubishi Elec Corp.), Aug. 6, 1993.
Cava et al., Enhancement of the Dielectric Constant of Ta2O5Through Substitution with Ti2O5, (MacMillan Journals Ltd.), Sep. 1995, pp. 215-217.
Roy et al., Sythesis of High-Quality Ultra-Thin Gate Oxides for ULSI Applications, AT&T Technical Journal, Nov./Dec. 1988, pp. 155-174.
Roy et al., Synthesis of Ultra-Thin Stacked Oxides Using Low Pressure Single Furnace Cluster Process, Materials Research Society Symp. Procedures, vol. 473, 1997, pp. 89-94.

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