Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
1999-10-14
2001-09-18
Bowers, Charles (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S163000, C438S184000, C438S199000, C438S689000
Reexamination Certificate
active
06291299
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a method for making MOS transistors, in particular, those with very thin gate oxides and very shallow LDD junctions.
BACKGROUND OF THE INVENTION
To make an MOS transistor, a polysilicon layer is formed on a thin silicon dioxide layer, which was previously formed on a silicon wafer. Those layers are then etched to define the transistor's gate electrode and gate oxide. That etch step exposes the gate oxide corner. Exposing that corner subjects the gate oxide to various impurities that may contaminate the oxide. Such contaminants may be present in the fabrication environment and in the materials and equipment used to process the wafer. If the gate oxide remains exposed during subsequent processing (e.g., up through the lightly doped drain (“LDD”) process steps), such process steps may damage the oxide in addition to contaminating it. Unless treated, such contamination/damage can degrade the exposed gate oxide corner, possibly causing it to breakdown.
The gate oxide corner can be protected from the potentially harmful effects of subsequent process steps by reoxidizing the silicon and the polysilicon after the etch step. Such an oxidation step, however, should not be used when making MOS transistors with very shallow LDD junctions. To make such a device, very low energies should be used for the LDD implants. At such energies, those implants may not adequately penetrate through such an oxide layer. Increasing the energy to enable adequate penetration through the oxide may not solve that problem. If the energy is increased to compensate for the surface oxide, such a relatively high implant energy may cause excessive deep scattering of the dopants. This may generate a relatively deep junction, which is unacceptable for deep sub-micron devices.
As an alternative to protecting the gate oxide corner prior to subsequent processing, the polysilicon and the silicon may be reoxidized afterwards, e.g., after the LDD implant steps. Unfortunately, such a process step causes oxidation enhanced diffusion of the LDD implants, which creates LDD junctions that may be too deep.
Accordingly, there is a need for a process for making an MOS transistor having very thin oxides and very shallow LDD junctions that protects the gate oxide corner without degrading the device's short-channel performance. The present invention provides such a process.
SUMMARY OF THE INVENTION
An improved method for making an MOS transistor is described. That method comprises forming a polysilicon layer on a silicon dioxide layer, which is formed on a substrate. The polysilicon and silicon dioxide layers are then etched to define a gate electrode and a gate oxide. After that etching step, dopants are implanted into the substrate. The exposed portion of the gate oxide is then cleaned and sealed.
REFERENCES:
patent: 4708904 (1987-11-01), Shimizu et al.
patent: 5672541 (1997-09-01), Booske et al.
patent: 6136669 (2000-10-01), Flitsch et al.
Chapter 15, Wet Processing: Cleaning; Etching; Lift-Off of “Silicon processing For the VLSI Era” vol. 1, by Wolf and Tauber, Lattice Press, California.
Bowers Charles
Intel Corporation
Sarkar Asok Kumar
Seeley Mark
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