Method for fabricating semiconductor integrated circuit...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S525000, C438S664000, C438S683000

Reexamination Certificate

active

06245622

ABSTRACT:

BACKGROUND OF THE INVENTION
(1) Field of the Invention
The present invention relates to a method for fabricating a semiconductor integrated circuit device, and more particularly to a method for fabricating a semiconductor integrated circuit device, including a step of forming a metal silicide film in a self-aligned form with respect to a diffusion layer.
(2) Description of the Related Art
In recent years, there have been significant developments in the miniaturization and high degree of integration of semiconductor integrated circuit devices. To this end, for example, in the fabrication of MOS type semiconductor integrated circuits, advances have been made for the prevention of the occurrence of a punch-through current by using shallow source/drain junctions. However, where the source/drain region is formed in a shallow form, there are increases in a source resistance and a drain resistance, and also there is an increase in a contact resistance, which lead to a deterioration of transistor performance. In order to avoid this problem, use is now made of a salicide (Self-Aligned Silicide) technique whereby a silicide film is formed in a self-aligned form on a surface of the source/drain region.
The silicide film is usually formed on a diffusion layer and, where the dopant of the diffusion layer consists of arsenic (As) and where, especially, the impurity concentration thereof is high, the silicide film forming speed is slow. Thus, in the case of, for example, the process for fabricating CMOS circuits, there arises a problem wherein the film thicknesses of an n-channel transistor and a p-channel transistor are different. The trend becomes more significant as the dimensions of the diffusion layer are made smaller.
Japanese Patent Application Kokai Publication No. Hei 5-291180 proposes to change a silicon surface to an amorphous state in order to avoid the above mentioned problem. The conventional technique proposed in the publication is explained with reference to
FIGS. 1-4
.
First, by using a known LOCOS (Local Oxidation of Silicon) technique, a field oxide film
302
is formed on a silicon substrate
301
and, after impurity ion-implantation, a thermal treatment is carried out so as to form a diffusion layer
303
. As sources of the impurity ions, use is made of arsenic (As), phosphorus (P), etc. in the case of an n-type diffusion layer and of boron (B), BF
2
, etc. in the case of a p-type diffusion layer.
Then, ion beams are irradiated on a surface of the silicon substrate
301
, in a direction vertical with respect to this surface, so that the crystalline structure of the silicon substrate
301
is destroyed and an amorphous silicon
5
layer
305
is formed as shown in FIG.
1
. The ion sources used here are arsenic, phosphorus, etc.
Next, on the entire surface, a titanium film
306
is formed by the deposition of titanium (Ti) using such a method as a DC magnetron sputtering (FIG.
2
). An appropriate thickness of the titanium film
306
is in the order of 20~40 nm. Then, thermal treatments are carried out in a nitrogen atmosphere as a first stage thereof, for example, for 30 seconds at a temperature from 600° C. to 700° C. and, as a second stage thereof, for example, for 30 seconds at a temperature 700° C. to 900° C., whereby the silicon of the amorphous silicon layer
305
and the titanium are caused to react with each other, and the titanium silicide film
307
is formed as shown in FIG.
3
.
The portion of the amorphous silicon layer
305
that remains unreacted with the titanium during the above thermal treatments undergoes recrystallization so that, after the completion of the thermal treatments, the unreacted portion of the amorphous silicon becomes the integral part of the diffusion layer
303
having a crystalline structure, and the amorphous silicon layer
305
no longer exists.
Finally, the removal of the unreacted titanium film
306
in a solution such as ammonia or hydrogen peroxide results in a semiconductor device structure as shown in FIG.
4
. Subsequently, in order to enhance the stabilization of the titanium silicide structure, a thermal treatment at a temperature of 800° C.~900° C. for about 5 to 20 seconds may optionally be carried out.
Another conventional example is disclosed in Japanese Patent Application Kokai Publication No. Hei 4-142732 wherein, for purposes of providing a space between a high concentration impurity region for device isolation located under a field oxide film and a silicide film, the impurity is introduced using a rotating oblique ion-implantation method, and the diffusion layer that is in contact with the silicide film is formed.
In the Japanese Patent Application Kokai Publication No. Hei 5-291180, it is shown that, by employing the method proposed therein, a stable titanium silicide film is formed both in the case where the dopant of the diffusion layer is arsenic and in the case where the line width of the diffusion layer is reduced to a minute value such as about 0.5 &mgr;m. However, if a further reduction in the value is made, it has been found that the formation of a stable titanium silicide becomes difficult if it is only made into an amorphous state. This is because, in the case where the line width becomes narrower as in the prior art example, there is an insufficiency of the amorphous silicon at the ends of the field oxide film presumably due to an increase in the effect of the suppression of the reaction. That is, in the prior art example, the change of silicon to an amorphous state is made through the ion-implantation in the vertical directions so that, at the two narrow ends of the diffusion layer that are sandwiched between the field oxide film and the silicon substrate, the silicon that has changed to an amorphous state is insufficient with respect to the silicide film to be formed. Thus, due to the insufficient supply of silicon, the silicide film to be formed is limited.
Also, in the method proposed in the Japanese Patent Application Kokai Publication No. Hei 4-142732, there have been problems in that, since the method is not one in which the silicon substrate is changed to an amorphous state, it is difficult to form a silicide on a diffusion layer which contains arsenic at a high concentration and also that, similarly as discussed in the other Patent Application Kokai Publication (Hei 5-291180), it is difficult to form a stable silicide film at a diffusion layer whose line width is reduced to minute values.
SUMMARY OF THE INVENTION
An object of the invention, therefore, is to overcome the problems existing in the prior art and to provide a method for fabricating a semiconductor device, which is capable of forming a sufficiently thick silicide film even on a narrow width diffusion layer.
A further object of the invention is to provide a method which includes a step of forming a metal silicide film in a self-aligned form.
According to one aspect of the invention, there is provided a method for fabricating a semiconductor integrated circuit device, comprising the steps of:
defining an active region so as to be surrounded by an insulating film on a silicon substrate;
changing to an amorphous state a surface of the active region and a semiconductor layer that extends underneath the insulating film by implanting ions from oblique angles;
forming a metal film over the silicon substrate by depositing a metal; and
forming a metal silicide layer by a thermal treatment causing the metal film and silicon in the amorphous state to react with each other.
According to another aspect of the invention, there is provided a method for fabricating a semiconductor integrated circuit device, comprising the steps of:
defining an active region so as to be surrounded by an insulating film on a silicon substrate;
forming a metal film over the silicon substrate by depositing a metal;
changing to an amorphous state a surface of the active region and a semiconductor layer that extends underneath the insulating film by implanting ions from oblique angles; and
forming a metal silicide layer by a thermal treatment causing the metal film and si

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