Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
1999-11-12
2001-05-01
Bowers, Charles (Department: 2813)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S622000, C438S623000, C438S624000, C438S634000, C438S700000, C438S735000, C438S736000
Reexamination Certificate
active
06225217
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a method of manufacturing a semiconductor device having multilayer wiring, and, especially, to a method of manufacturing a semiconductor device in which the dielectric constant of an insulation film formed between wiring layers is reduced.
2. Description of the Related Art
A development of semiconductor integrated circuits with a fine structure has been attained in recent years. Such a development is particularly significant in the fields of semiconductor integrated circuits containing logical circuits with a multilayer wiring structure. As the interval between metal wiring layers is micro-sized, a wiring capacitance increases which causes a reduction in electric signal speed and defects due to crosstalk occurs, that is a phenomenon in which some signals affects other signals in terms of a noise. For this, studies for reducing the dielectric constant of an insulation film formed between wiring layers have been made.
For example, there is a description of an evaluation of the dielectric constant of Hydrogen Silsesquioxane (HSQ) in 43rd Apply. Phys. Lett., Related Society Lecture Preprints, No. 2 issue, p654, (26a-N-6 “Evaluation of Dielectric Constant of Hydrogen Silsesquioxane (ESQ)”). In this description of the Preprints, the specific dielectric constant of an inorganic SOG (Spin On Glass) film formed by curing in a condition of reduced pressure is 2.7. However, when an O
2
plasma process is performed, the specific dielectric constant increases up to 3.9. This is, as described in the description of the Preprints, because an Si—OH bond is produced in the film in the O
2
plasma process whereby a water content in the HSQ film is increased.
It is considered that the above semiconductor is manufactured according to a general process though a production process for the semiconductor device is not described in the above Preprints. Here, a conventional process for manufacturing a semiconductor device with multilayer wiring will be explained.
FIGS. 1A
to
1
F are sectional views showing a customary method of manufacturing a semiconductor device in sequential order.
In a conventional method of producing a semiconductor device, as shown in
FIG. 1A
, a first silicon oxide film
101
with a thickness of about 500 nm is first formed on a silicon substrate (not shown). Next, a first aluminum-based metal wiring layer
102
is selectively formed on the first silicon oxide film
101
. An HSQ film
103
with a thickness of about 400 nm is then formed on the first silicon oxide film
101
as a low dielectric constant film by application and annealing. At this time, the upper surface of the first aluminum-based metal wiring layer
102
is coated with the HSQ film
103
. A second silicon oxide film
104
with a thickness of about 1400 nm is successively formed on the HSQ film
103
. Then, for formation of a flat surface, the thickness of the second silicon oxide film
104
is reduced to as thin as about 700 nm by chemically mechanical polishing (CMP). After that, a photoresist
105
is applied to the second silicon oxide film
104
. The applied photoresist
105
is exposed and developed so that it has a prescribed pattern.
Next, as shown in
FIG. 1B
, the second silicon oxide film
104
and the HSQ film
103
are etched using a fluorocarbon-containing gas and utilizing the photoresist
105
as a mask. As a consequence, a contact hole
104
a
extending to the first aluminum-based metal wiring layer
102
is formed under an opening of the photoresist
105
.
After that, an O
2
plasma process is performed. At this time, the HSQ film
103
open to the contact hole
104
a
is exposed to the O
2
plasma whereby an Si—OH bond is produced on the surface of the ESQ film
103
which is open to the contact hole
104
a
. Then, as shown
FIG. 1C
, the photoresist
105
is removed by a resist releasing solution. At this time, since the surface of the HSQ film
103
open to the contact hole
104
a
is exposed to the resist releasing solution, a moistened portion
106
with a water content higher than that of the remainder portions is formed on the surface.
Then, as shown in
FIG. 1D
, a titanium nitride film
107
is formed as a barrier metal film on the entire surface. A tungsten film
108
is formed on the titanium nitride film
107
by a blanket CVD method. In this case, a void
109
is sometimes formed within the contact hole
104
a.
As shown in
FIG. 1E
, the tungsten film
108
and the titanium nitride film
107
formed on the second silicon oxide film
104
are removed by a tungsten etch back method whereby the tungsten film
108
and the titanium nitride film
107
only formed within the contact hole
104
a
are left unremoved.
As shown in
FIG. 1F
, a second aluminum-based metal wiring layer
110
is then formed on the entire surface.
It was confirmed that the semiconductor device produced in this conventional manner had high junction resistance and a connection failure had been produced in the contact hole
104
a.
Next, a conventional method of manufacturing a semiconductor device provided with a channel-wiring layer will be illustrated.
FIGS. 2A
to
2
F are sectional views showing a conventional method of manufacturing a semiconductor device in sequential order. First, a plurality of base layers (not shown) are formed on a silicon substrate (not shown) and a silicon nitride film
111
with a thickness of about 100 nm is formed on the top of the base layers as shown in FIG.
2
A. Then, an HSQ film
112
with a thickness of about 500 nm is formed on the silicon nitride film
111
by application and annealing. A silicon oxide film
113
with a thickness of about 100 nm is formed as a cap film on the HSQ film
112
.
Next, as shown in
FIG. 2B
, a photoresist film
114
is applied to the silicon oxide film
113
, Then, it is exposed and developed so that it has a prescribed pattern.
After that, as shown in
FIG. 2C
, the silicon oxide film
113
and the HSQ film
112
are etched using a fluorocarbon-containing gas and utilizing the photoresist
114
as a mask. As a consequence, a channel
112
a
extending to the silicon nitride film
111
is formed under an opening of the photoresist
114
.
Then, an O
2
plasma process is performed. At this time, the surface of the HSQ film
112
open to the channel
112
a
is denatured and tends to be moistened. Then, as shown in
FIG. 2D
, the photoresist
114
is removed by a resist releasing solution. At this time, since the surface of the HSQ film
112
open to the channel
112
a
is exposed to the resist releasing solution, a moistened portion
115
with a water content higher than that of the remainder portions is formed on the surface.
Then, as shown in
FIG. 2E
, a titanium film
116
with a thickness of about 50 nm is formed as a barrier metal film on the entire surface by a MOCVD method followed by a step of forming a copper film
117
with a thickness of about 500 nm on the entire surface by a CVD method.
As shown in
FIG. 2F
, the copper film
117
and the titanium film
116
formed on the silicon oxide film
113
are removed by CMP treatment whereby the copper film
117
and the titanium film
116
only formed within the channel
112
a
are left unremoved.
The capacitance between channel-wiring layers of the semiconductor device prepared in this manner was measured. As a result, the measured capacitance was the same as that of a semiconductor device produced utilizing a formation of a general plasma oxide film. It is considered that this is due to the O
2
plasma process.
As a film with a low dielectric constant, a film other than the HSQ film is sometimes used. An example of using a fluororesin film as the film of a low dielectric constant is described in Monthly Semiconductor World, February (1997), p82-84, entitled “An improvement in etching characteristics for preparing a low dielectric constant due to a fluororesin film is achieved, but a problem of oxygen plasma resistance remains”. In this prior art, a via hole is formed using a fluororesin film with a dielectric
Aoki Hidemitsu
Tsuchiya Yasuaki
Usami Tatsuya
Yamasaki Shinya
Bowers Charles
Hayes, Soloway, Hennessey, Grossman & Hage
NEC Corporation
Pham Thanhha
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