Method of forming shallow trench isolation structure

Details Method of forming shallow trench isolation structure Method of forming shallow trench isolation structure

1999-11-23

2001-06-26

Booth, Richard (Department: 2812)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S404000, C438S424000, C438S435000

Reexamination Certificate

active

06251735

ABSTRACT:

CROSS-REFERENCE TO RELATED APPLICATION
This application claims the priority benefit of Taiwan application Ser. No. 88118757, filed Oct. 29, 1999.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of forming the device isolation structure of an integrated circuit (IC). More particularly, the present invention relates to a method of forming a shallow trench isolation (STI) structure.
2. Description of the Related Art
A complete integrated circuit usually consists of millions of metal-oxide-semiconductor (MOS) transistors. To prevent any two neighboring transistors from short-circuiting, some isolating structures need to be formed between transistors. Conventionally, a field oxide (FOX) layer is formed around transistors by local oxidation of silicon (LOCOS). However, due to many side effects related to the use of the field oxide layer such as internal stress and bird's beak encroachment problem, field oxide isolation has been gradually replaced by shallow trench isolation (STI) structures. In fact, as the critical dimensions (CDs) of devices continue to decrease, STI structures have become widely used in deep sub-micron fabrication process.
FIGS. 1A through 1C
are schematic, cross-sectional views showing the steps for producing a conventional STI structure in a substrate.
As shown in
FIG. 1A
, a pad oxide layer
102
and a mask layer
104
are formed over a substrate
100
in sequence. The pad oxide layer
102
is formed by thermal oxidation. A shallow trench
106
is formed in the substrate
100
by a photolithographic and etching process. A liner oxide layer
108
is formed on the exposed substrate
100
inside the shallow trench
106
by thermal oxidation.
As shown in
FIG. 1B
, an oxide layer
110
that fills the shallow trench
106
is formed. The oxide layer
110
is formed by depositing oxide material into the shallow trench
106
and over the mask layer
104
to form an oxide layer (not shown in the figure). The oxide layer above the mask layer
104
is then removed by chemical-mechanical polishing. The oxide layer
110
is formed by using ozone (
03
) and tetra-ethyl-ortho-silicate (TEOS) as reactive gases in a chemical vapor deposition (CVD).
As shown in
FIG. 1C
, the pad oxide layer
102
and the mask layer
104
are removed to form the STI structure. The pad oxide layer
102
and the mask layer
104
are removed by wet etching.
Because a shallow trench has a definite aspect ratio (AR), in other words, depth of the shallow trench is greater than its width, filling the shallow trench with oxide material become increasingly difficult as the critical dimensions of devices are reduced. This is especially serious when O
3
and TEOS are used as the reactive gas in a chemical vapor deposition to form the oxide layer in the shallow trench. Since the deposition rate of oxide on the bottom and the sides of the shallow trench are almost identical, after filling the shallow trench with oxide material, voids or seams are likely formed in the middle of all shallow trench structures with a definite aspect ratio.
SUMMARY OF THE INVENTION
The invention provides a method of forming an STI structure. A substrate is first provided. A pad oxide layer is formed over the substrate, and then a mask layer is formed over the pad oxide layer. Photolithographic and etching processes are used to form a shallow trench through the mask layer, the pad oxide layer and into the substrate. A liner oxide layer is formed on the exposed surface in the shallow trench interior. A first dielectric layer is formed over the mask layer and the liner oxide layer. A second dielectric layer is formed over the first dielectric layer. The second dielectric layer is etched back to form spacers on the sidewalls of the shallow trench while exposing a portion of the first dielectric layer at the bottom of the shallow trench. Using ozone and tetra-ethyl-ortho-silicate (TEOS) as reactive gases, a chemical vapor deposition is carried out to form a silicon oxide layer that fills the shallow trench and covers the first dielectric layer. The silicon oxide layer is deposited at a faster rate on the surface of the first dielectric layer than on the surface of the spacers. A planarization operation is next carried out to remove the silicon oxide layer and the first dielectric layer above the mask layer. Finally, the mask layer and the pad oxide layer are sequentially removed.
In this invention, a dielectric layer is formed over the interior surface of a shallow trench before forming spacers on the sidewalls of the shallow trench that expose a portion of the dielectric layer at the bottom of the shallow trench. Hence, subsequently a silicon oxide layer is deposited at a faster rate on the bottom surface of the shallow trench than on the side surface of the shallow trench. Therefore, for a shallow trench having a definite aspect ratio, the chemical vapor deposition process using ozone and TEOS as reactive gases is able to form a silicon oxide layer inside the shallow trench, which silicon oxide layer inside the shallow trench is free of voids or seams.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.


REFERENCES:
patent: 6093618 (2000-07-01), Chen et al.
patent: 6140208 (2000-10-01), Agahi et al.

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