Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
1999-12-03
2001-05-15
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C505S330000
Reexamination Certificate
active
06232155
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to semiconductor devices and manufacturing methods, and more particularly to semiconductor-on-insulator devices and fabrication methods.
BACKGROUND OF THE INVENTION
Semiconductor-on-insulator (SOI) devices are widely used in microelectronics. In general, SOI devices include active devices such as transistors in a thin semiconductor layer which is on an insulator. In contrast, bulk semiconductor devices include active devices such as transistors in a bulk semiconductor region. SOI devices often use a layer of monocrystalline silicon as a semiconductor material. These devices are often referred to as silicon-on-insulator devices.
Transistors which are formed using SOI technology, hereinafter referred to as SOI transistors, can provide improved isolation and can generally withstand higher supply voltages than bulk semiconductor devices. Moreover, thin film SOI transistors generally have small subthreshold swings and may be used with operating voltages of two volts or less without degrading the operation thereof.
Unfortunately, SOI transistors may be susceptible to bipolar-induced breakdown due to the floating body thereon.
FIG. 1
is a cross-sectional view which illustrates a conventional SOI transistor, and particularly SOI CMOS transistors. As shown in
FIG. 1
, an insulating layer
3
is located on a semiconductor substrate
1
. A transistor, comprising a gate
7
, a source
8
and a drain
9
is formed in a thin semiconductor film on the insulating layer
3
. Also included is a body layer
5
where the channels of the transistor are located, between the source
8
and drain
9
.
As shown in
FIG. 1
, unlike conventional bulk transistors, the SOI transistor generally does not include a contact which can apply a voltage to the body layer
5
. Thus, the body layer
5
is floating. Unfortunately, the floating body layer
5
may reduce the breakdown voltage of the transistor due to the formation of a parasitic bipolar transistor.
For example, for an N-type transistor, if electrons reach a depletion region of the drain
9
from the source
8
where the electric field of the drain is increased by the increased voltage of the drain
9
, impact ionization may occur due to the strong forces caused by the increased electric field. Electron hole pairs may be generated. Electrons are extracted through a drain electrode (not shown in
FIG. 1
) and holes move toward the body layer
5
and are stored thereat.
Accordingly, the potential of the body layer
5
may increase so that the junction between the body layer
5
and the source is forward-biased. The electrons which are injected from the source
8
to the body layer
5
can create a parasitic bipolar transistor in which the source
8
, the body layer
5
and the drain
9
function as an emitter, a base and a collector, respectively.
When the parasitic bipolar transistor is formed, a snap-back phenomena may be produced such that the drain current abruptly increases when reduced voltage is applied to the source and drain of the SOI transistor. Accordingly, the breakdown voltage of the SOI transistor may be reduced.
It will be understood that the floating body effect described above may be reduced by forming contacts to the body layer
5
. However, since each body layer
5
is isolated from the remaining transistors in a conventional SOI device, it may be difficult to form body layer contacts. Moreover, for highly integrated devices containing many transistors, the body layer contact for each contact may reduce the integration density of the device.
SUMMARY OF THE INVENTION
It is therefore an object of the invention to provide SOI devices which can reduce or suppress the floating body effect, and methods of fabricating the same.
It is another object of the present invention to provide SOI devices which can apply voltages to the body region of every transistor, and methods of fabricating the same.
It is still another object of the present invention to provide highly integrated SOI devices and methods of fabricating the same.
These and other objects are provided, according to the present invention, by SOI devices which include a substrate, an insulating layer on the substrate and a semiconductor film on the insulating layer, wherein the semiconductor film comprises alternating thin and thick film semiconductor regions on the insulating layer. The thin film semiconductor regions include a plurality of source/drains therein. The thick film semiconductor regions form a plurality of body layers and include an insulated gate thereon, a respective insulated gate being located between adjacent source/drains. The thick film semiconductor regions are electrically interconnected in the semiconductor film. Accordingly, each body region may be connected to a voltage, to thereby reduce the floating body effect, without requiring a decrease in integration density.
Preferably, the thin and thick film semiconductor regions comprise alternating thin and thick film semiconductor stripes. The thick film semiconductor stripes extend around the ends of the thin film semiconductor stripes, to thereby form a continuous thick film region.
According to another aspect, at least one isolation film is included, surrounding the alternating thin and thick film semiconductor regions. The at least one isolation film is thinner than the thick film semiconductor regions and is preferably of the same thickness as the thin film semiconductor regions. The isolation film is preferably a trench isolation film.
According to another aspect of the present invention, a plurality of capacitors are formed in the insulating layer. A respective capacitor is electrically connected to a respective source/drain.
SOI devices are fabricated, according to method aspects of the present invention, by forming a plurality of spaced apart trenches in a first face of a semiconductor substrate. An insulating layer is formed on the first face of the semiconductor substrate, including on the trenches. A second substrate is bonded to the insulating layer, opposite the semiconductor substrate. The semiconductor substrate is thinned at a second face thereof, which is opposite the first face, until a semiconductor film remains on the insulating layer, having alternating thin and thick film semiconductor regions on the insulating layer. The thinning step may be provided by etching the semiconductor substrate at the second face thereof.
After the semiconductor substrate is thinned, a plurality of source/drains are formed in the thin film semiconductor regions. A plurality of insulated gates are formed on thick film semiconductor regions to define body layers, such that a respective insulated gate is located between adjacent source/drains.
In a preferred embodiment, at least one isolation trench is formed in the first face of the semiconductor substrate, surrounding the plurality of spaced apart trenches, prior to forming the insulating layer on the first face. The isolation trenches are deeper than the plurality of spaced apart trenches. Then, the thinning step comprises the step of thinning the semiconductor substrate at a second face thereof, which is opposite the first face, until the isolation trenches are exposed.
An interlayer insulating film may be formed on the thin and thick film semiconductor regions, after the step of forming the plurality of source/drains. The interlayer insulating film may include an electrical contact therein which electrically contacts at least one of the thick film semiconductor regions, and preferably contacts the outermost one of the thick film semiconductor regions.
Buried capacitors may also be formed in the SOI devices. In particular, after the spaced apart trenches are formed, an interlayer insulating film is formed on the first face of the semiconductor substrate, including on the trenches. The interlayer insulating film includes apertures therein which expose portions of the trenches. Storage electrodes are formed on the interlayer insulating film, electrically contacting the trenches through the apertures. A dielectric fi
Myers Bigel & Sibley & Sajovec
Rocchegiani Renzo N.
Samsung Electronics Co,. Ltd.
Smith Matthew
LandOfFree
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