Single-electron memory cell configuration

Details Single-electron memory cell configuration Single-electron memory cell configuration

1997-06-02

1998-12-01

Yoo, Do Hyun

Static information storage and retrieval

Systems using particular element

Capacitors

365149, G11C 700

Patent

active

058448349

ABSTRACT:
Each memory cell of an array has a single-electron transistor and a single-electron memory element. The single-electron transistor is driven by a charge stored in the memory element. When a read voltage is applied, a current flows through the single-electron transistor which is dependent on the stored charge, but the stored charge in not changed. When a write voltage is applied, the magnitude of which is greater than the read voltage, then the stored charge is changed. The memory cells of the array are each connected between first lines and transverse second lines of a memory cell configuration.

REFERENCES:
patent: 5357460 (1994-10-01), Yusuki et al.
"Single-Electron Memory" (Nakazato et al.), American Institute of Physics, 75 (10), May 15, 1994, pp. 5123-5134.
"Single Electron Memory Cells", Electronics World, Apr. 1996, ISSCC Report, p. 298.
"Room-Temperature Single-Electron Memory" (Yano et al.), IEEE Transactions on Electron Devices, vol. 41, No. 9, Sep. 1994, pp. 1628-1637.
"Simulation of Single Electron Circuits" (Rosner et al.), Microelectronic Engineering 27, 1995, pp. 55-58.

Affiliated with

Also associated with

Rating

Single-electron memory cell configuration does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Single-electron memory cell configuration, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Single-electron memory cell configuration will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2400738