MOS Semiconductor storage module

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch

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Details

307DIG3, 365205, G11C 700, G11C 1140

Patent

active

041225465

ABSTRACT:
A MOS storage module has MOS transistor storage cells disposed between word and bit lines. A weighting network is symmetrically connected in each pair of bit lines for evaluating read signals. The weighting networks are arranged in a column with the storage cells which are connected to first inputs of the weighting networks form a first storage cell field and the storage cells which are connected to second inputs of the weighting networks form a second storage cell field and all storage cell fields on the storage module are disposed on one side of the column of weighting networks.

REFERENCES:
patent: 3983545 (1976-09-01), Cordaro

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