Memory integrated circuit and methods for manufacturing the same

Details Memory integrated circuit and methods for manufacturing the same Memory integrated circuit and methods for manufacturing the same

1998-06-18

2000-04-18

Chang, Joni

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

257306, 257337, 257296, 438587, 438365, H01L 218242

Patent

active

060514612

ABSTRACT:
A memory integrated circuit which is driven with a low power and reduced the cell area and a method for manufacturing the same. A plurality of active regions having an H-shape with four source regions and common drain region are formed on a semiconductor substrate. Four word lines each having a different source correspondingly pass through each of the four source regions of an active region, thereby forming four transistors driven, independently. These four transistors are designed so as to share one bit line, thereby reducing the driving voltage of the transistor to 1/4 Vcc. With a low power driving source, four transistors and a capacitor are formed on a small area to thereby reduce the cell size to 33% and even more.

REFERENCES:
patent: 5526303 (1996-06-01), Okajima
patent: 5583358 (1996-12-01), Kimura et al.
patent: 5635742 (1997-06-01), Hoshi et al.
patent: 5955757 (1999-09-01), Jen et al.
S. Wolf, "Silicon Processing for the VLSI Era; vol. 2, Process Integration", Lattice Press, Sunset Beach California 1990, pp. 201-203; 368-370.

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