Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-07-14
1998-07-28
Chang, Joni
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438277, 438282, H01L 218246, H01L 218234
Patent
active
057862532
ABSTRACT:
A method of making multi-level ROM devices in which the gate width controls the threshold voltage setting of each memory unit, instead of the conventional method of setting the threshold voltage through the implantation of ions into the channel region of a memory unit. The memory units include memory units having their word line polysilicon layer completely removed, which are units in an OFF state. Memory units having part of the word line polysilicon layer removed are units with a higher threshold voltage, while memory units having the word line polysilicon layer left untouched are memory units with a lower threshold voltage.
REFERENCES:
patent: 4180826 (1979-12-01), Shappir
patent: 5394356 (1995-02-01), Yang
Chang Joni
United Microelectronics Corporation
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