System and method for testing of embedded processor

Details System and method for testing of embedded processor System and method for testing of embedded processor

1998-08-27

2000-10-10

Chung, Phung M.

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

G01R 3128

Patent

active

06131174&

ABSTRACT:
An interlocutor system and method is described that allows for at-speed testing of an embedded microcontroller at the control of an embedded digital signal processor in a system-on-a-chip architecture. The interlocutor system includes a buffer for temporarily storing test program data words output by the DSP and retrieved by the microcontroller being tested and a control circuit for controlling the microcontroller and DSP. The microcontroller, DSP, and interlocutor system are all located on a single integrated circuit.

REFERENCES:
patent: 5157664 (1992-10-01), Waite
patent: 5406554 (1995-04-01), Parry
patent: 5909544 (1999-06-01), Anderson, II et al.

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