Reticle based skew lots

Details Reticle based skew lots Reticle based skew lots

1998-03-19

2000-10-10

Niebling, John F.

Semiconductor device manufacturing: process

Masking

438942, 430 5, 430316, 430396, H01L 2100

Patent

active

061301736

ABSTRACT:
A process of forming on an integrated circuit substrate at least two different gate masks having different lengths is described. The process includes: (i) providing the integrated circuit substrate having a surface; (ii) depositing on the surface a gate layer; and (iii) masking portions of the gate layer using a reticle having at least two die patterns including a first die pattern defining an image of a first gate electrode having a first length and a second die pattern defining an image of a second gate electrode having a second length, the first length being different from the second length and relative positioning of the image of the first gate electrode in the first die pattern and of the image of second gate electrode in the second die pattern is substantially similar.

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