Method of making porous-Si capacitors for high density drams cel

Details Method of making porous-Si capacitors for high density drams cel Method of making porous-Si capacitors for high density drams cel

1996-11-18

1998-03-03

Tsai, Jey

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438255, H01L 218242

Patent

active

057233730

ABSTRACT:
The present invention is a method of manufacturing porous-Si capacitors for use in semiconductor memories. The present invention uses a silicon oxide layer as an etching mask to etch a polysilicon layer to form a porous-Si structure. The etching process is performed to etch a portion of the polysilicon layer and to etch away the remaining HSG-Si. Next, an oxide layer which is in micro grooves is removed to define a porous-Si bottom storage. The present invention can be used to increase the surface area of the capacitor.

REFERENCES:
patent: 5256587 (1993-10-01), Jun et al.
patent: 5350707 (1994-09-01), Ko et al.
patent: 5354705 (1994-10-01), Mathews et al.

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