Co-implantation of arsenic and phosphorus in extended drain regi

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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438529, H01L 21336

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active

058937420

ABSTRACT:
A high voltage NMOS device includes an extended drain region formed by implantation of arsenic and phosphorus and a drivein of both the species. The dosage of arsenic is substantially higher than the dosage of phosphorus, so that upon drivein, the slower diffusing arsenic is highly concentrated near the surface of the extended drain region, while the more rapidly diffusing phosphorus provides a gradual gradient of concentration of dopant into the extended drain region.

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patent: 5024960 (1991-06-01), Haken
Eiji Takeda, "An AS-P(n.sup.+ -n.sup.-) Double Diffused Drain MOSFET for VLSI's," IEEE Transactions on Electron Devices, vol. ED-30, No. 6, Jun. 19, 1983 IEEE.
Y. Toyoshima et al., "Profiled Lightly Doped Drain (PLDD) Structure for High Reliable NMOS-FETs," Semiconductor Device Engineering Laboratory Toshiba Corporation. (No Date).
Hsia et al., "Polysilicon Oxidation Self-Aligned MOS (POSA MOS)--A New Self-Aligned Double Source/Drain Ion Implantation Technique for VLSI", IEEE Electron Device Letters, vol. EDL-3, No. 2, Feb. 1982, New York, USA, pp. 40-42.
Yoshikawa et al., "A Reliable Profiled Lightly Doped Drain (PLD) Cell for High-Density Submicrometer EPROM's and Flash EEPROM's", IEEE Transactions on Electron Devices, vol. 37, No. 2, Apr. 1990, New York, USA, pp. 999-1006.

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