Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1996-02-14

1998-06-09

Dinh, Son T.

Static information storage and retrieval

Systems using particular element

Capacitors

365 63, 365222, G11C 700

Patent

active

057645620

ABSTRACT:
A memory cell is connected between a bit line and an electrode node. The memory cell includes a transistor connected to the bit line and a capacitor connected to the electrode node. In the operation, the potential of a word line is raised after the potential of the electrode node is lowered to the L-level. Thereby, electric charges are read onto the bit line from only the memory cell connected to the electrode node of which potential is selectively lowered. Therefore, only the selected bit line among the plurality of bit lines can be operated. Consequently, the power consumption can be reduced.

REFERENCES:
patent: 5495440 (1996-02-01), Asakura
patent: 5671174 (1997-09-01), Koike et al.
patent: 5684749 (1997-11-01), Seyyedy et al.
Roy E. Scheuerlein et al., "Shared Word Line DRAM Cell", IEEE Journal of Solid-State Circuits, vol. SC-19, No. 5, Oct. 1994, pp. 640-645.
K. Terada et al., "A New VLSI Memory Cell Using Capacitance Coupling", IEDM 82, pp. 624-627.
W.G. Oldham et al., "A One-Transistor Memory Cell With Nondestructive Readout", IEEE ISSCC, Feb. 1973, pp. 34-35.

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