Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-09-21
2000-12-12
Zarabian, Amir
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438270, 438273, 438527, 438529, H01L 21336, H01L 21423
Patent
active
061598054
ABSTRACT:
An electronic semiconductor device (20) with a control electrode (19) consisting of self-aligned polycrystalline silicon (4) and silicide (12), of the type in which said control electrode (19) is formed above a portion (1) of semiconductor material which accommodates active areas (9) of the device (20) laterally with respect to the electrode, has the active areas (9) at least partially protected by an oxide layer (10) while the silicide layer (12) is obtained by means of direct reaction between a cobalt film deposited on the polycrystalline silicon (4) and on the oxide layer (10). (FIG. 9)
REFERENCES:
patent: 4819037 (1989-04-01), Sakakibara et al.
patent: 4883767 (1989-11-01), Gray et al.
patent: 5171705 (1992-12-01), Choy
patent: 5338693 (1994-08-01), Kinzer et al.
patent: 5393685 (1995-02-01), Yoo et al.
patent: 5589408 (1996-12-01), Robb et al.
patent: 5811335 (1998-09-01), Santangelo et al.
patent: 5814859 (1998-09-01), Ghezzo et al.
patent: 5817546 (1998-10-01), Ferla et al.
patent: 5981343 (1999-11-01), Magri et al.
patent: 6043126 (2000-03-01), Kinzer
patent: 6069384 (2000-05-01), Hause et al.
Shenai et al., "High-Performance Vertical-Power DMOSFETs with Selectively Silicided Gate and Source Regions," IEEE Electron Device Letters, 10(4) pp. 153-155, 1989.
Murao et al., "A High Performance CMOS Technology with Ti-Silicided P/N-Type Poly-SI Gates," International Electron Devices Meeting, Technical Digest, Washington D.C., pp. 518-521, 1983.
Narita et al., "A High-Speed 1-Mbit EPROM with a Ti-Silicided gate," IEEE Transactions on Magnetics SC20, No. 1, pp. 418-421, 1985.
Wolf, "Silicon Processing For The VLSI Era vol. I: Process Technology," Lattice Press, 1986, pp. 188-189.
Ghandhi, "VLSI Fabrication Principles Silicon and Gallium Arsenide," Second Edition, John Wiley & Sons, Inc., 1994, pp. 551-553, 608-610 and 629-633.
Ferla Giuseppe
Santangelo Antonello
Galanthay Theodore E.
Lebentritt Michael S.
STMicroelectronics S.r.l.
Tarleton E. Russell
Zarabian Amir
LandOfFree
Semiconductor electronic device with autoaligned polysilicon and does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor electronic device with autoaligned polysilicon and, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor electronic device with autoaligned polysilicon and will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-216204