Structure and fabricating method of stacked capacitor

Details Structure and fabricating method of stacked capacitor Structure and fabricating method of stacked capacitor

1999-04-26

2000-12-12

Chaudhari, Chandra

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438964, H01L 218242

Patent

active

061597937

ABSTRACT:
A structure and method of fabricating a stacked capacitor which forms a hemispherical grain (HSG) polysilicon on the surface of a crown shaped amorphous silicon layer. By selective tungsten deposition, the HSG polysilicon and the amorphous silicon layer are displaced with a rough tungsten layer. A material with a high dielectric constant and a metal layer are formed in sequence as a dielectric layer and an upper electrode of the capacitor, so as to form a crown metal-insulator-metal (MIM) capacitor.

REFERENCES:
patent: 5930641 (1999-07-01), Pan
patent: 5960294 (1999-09-01), Zahurak et al.
patent: 6060355 (1999-07-01), Batra et al.

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