Semiconductor memory device with read/write controlling unit for

Details Semiconductor memory device with read/write controlling unit for Semiconductor memory device with read/write controlling unit for

1991-03-22

1993-02-16

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

36518901, 36518908, G11C 1300

Patent

active

051876841

ABSTRACT:
A semiconductor memory device comprises a plurality of memory cells respectively storing data bits in a rewritable manner, a plurality of digit lines coupled to the memory cells, a column selector unit having a plurality of transfer gate transistors coupled between the digit lines and a data line, and a read/write controlling unit responsive to address bits and allowing one of the transfer gate transistors to couple the data line to the associated digit line, wherein the read/write controlling unit is further responsive to a bit pattern stored in a register and allows a plurality of transfer gate transistors to couple the data line to the associated digit lines so that a new data bit is concurrently written into a plurality of memory cells.

REFERENCES:
patent: 4969126 (1990-11-01), Maeno

Affiliated with

Also associated with

Rating

Semiconductor memory device with read/write controlling unit for does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor memory device with read/write controlling unit for, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device with read/write controlling unit for will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2153008