Memory devices containing dual-string NOR memory arrays therein

Details Memory devices containing dual-string NOR memory arrays therein Memory devices containing dual-string NOR memory arrays therein

1996-07-19

1999-11-02

Chaudhuri, Olik

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257296, 257326, H01L 29788, H01L 27108, H01L 2976, H01L 2994

Patent

active

059775840

ABSTRACT:
A nonvolatile memory circuit is formed on a substrate. Spaced apart first, second and third source/drain regions are formed in the substrate, the third source/drain region disposed between the first and second source/drain regions, the first, second and third source/drain regions having a generally elongate shape. A first row of floating gate electrodes are formed on the substrate, disposed between the first and third source/drain regions. A second row of floating gate electrodes is formed on the substrate, disposed between the second and third source/drain regions. A plurality of insulated word lines is formed on the substrate, a respective one of the insulated word lines overlying a respective one of the first row of floating gate electrodes and a respective one of the second row of floating gate electrodes and running in a direction transverse to the first, second and third source/drain regions. A plurality of channel stop regions may be formed in the substrate, a respective one of the plurality of channel stop regions being disposed between a respective pair of floating gate electrodes in a respective one of the first and second rows of floating gate electrodes.

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