Static information storage and retrieval – Read/write circuit – Data refresh
Patent
1996-07-24
1998-04-21
Nelms, David C.
Static information storage and retrieval
Read/write circuit
Data refresh
36523003, 36523006, 36523008, G11C 700, G11C 800
Patent
active
057425540
ABSTRACT:
A volatile memory device or a refreshing method for refreshing information stored in a plurality of memory cells, comprises: a plurality of banks each having a plurality of cell array blocks each of which have a plurality of memory cells and a decoder portion for selecting the memory cells; an address buffer being supplied with an address signal; and a plurality of predecoders associated respectively with the banks, for being supplied with an output signal from the address buffer and supplying predecoded signals to the associated banks. When the volatile memory device is refreshed, the predecoder associated with one of the banks which is selected is activated, and a plurality of cell array blocks in the selected bank are simultaneously selected, and the predecoders associated with the banks which are unselected are inactivated. According to the present invention, the high speed refresh and low power consumption can be realized.
REFERENCES:
patent: 4984210 (1991-01-01), Kumanoya et al.
patent: 5251176 (1993-10-01), Komatsu
patent: 5402384 (1995-03-01), Fujisawa
patent: 5450364 (1995-09-01), Stephens, Jr. et al.
patent: 5463590 (1995-10-01), Watanabe
patent: 5511033 (1996-04-01), Jung
Fujitsu Limited
Nelms David C.
Phan Trong
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