Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1999-08-20
2000-08-15
Fahmy, Wael
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438226, 438283, H01L 21336
Patent
active
061035750
ABSTRACT:
A flash memory cell formed in a semiconductor substrate. The memory cell comprises: (a) a gate oxide formed atop said semiconductor substrate, said gate oxide including a thin region and a thick region; (b) a floating gate formed atop said thin region; (c) a control gate formed atop said thick region; (d) a drain region formed under said thin region and within said floating gate; (e) a source region formed under said thick region and outside said control gate; and (f) an insulating dielectric layer between said control gate and said floating gate.
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patent: 5780893 (1998-07-01), Sugaya
patent: 5792670 (1998-08-01), Pio et al.
patent: 5981342 (1999-11-01), Kakoschke et al.
Eaton Kurt
Fahmy Wael
Worldwide Semiconductor Manufacturing Corporation
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