Fishing – trapping – and vermin destroying
Patent
1996-05-28
1997-02-25
Niebling, John
Fishing, trapping, and vermin destroying
437 52, 437 60, 437918, H01L 218247, H01L 218244
Patent
active
056058535
ABSTRACT:
An integrated process for forming a 4T SRAM and a floating gate memory, with logic, on the same integrated circuit, is provided. A semiconductor substrate is provided having field isolation regions, with a gate and gate oxide between the field isolation regions. Polysilicon interconnects are formed over a portion of the field isolation regions, only in a first memory region, and a floating gate over a field oxide region in a second memory region. Active regions are formed in the substrate, adjacent to each gate. Insulating spacers are formed on the sidewalls of the gates, polysilicon interconnects and the floating gate, and later removed from the interconnect. A layer of titanium silicide is formed over the gates, except over the floating gate in the second memory region, and also over the polysilicon interconnects and active regions. An interpoly oxide is formed over the semiconductor substrate. An opening is formed in the interpoly oxide over the polysilicon interconnect. A second layer of polysilicon is deposited over the substrate. The second layer of polysilicon is patterned to form a control gate over the floating gate, and to form a load resistor for the SRAM.
REFERENCES:
patent: 5066602 (1991-11-01), Takemoto et al.
patent: 5192702 (1993-03-01), Tseng
patent: 5340762 (1994-08-01), Vora
patent: 5422315 (1995-06-01), Kobayashi
patent: 5496756 (1996-03-01), Sharma et al.
patent: 5498559 (1996-03-01), Chang
patent: 5538912 (1996-07-01), Kunori et al.
patent: 5550072 (1996-08-01), Cacharelis et al.
patent: 5559052 (1996-09-01), Lee et al.
S. Wolf, "Silicon Processing For The VLSI Era-vol. 2", Lattiee Press Sunset Beach CA. pp. 571-572, 1990, month unknown.
Lee Jin-Yuan
Liang Mong-Song
Yoo Chue-San
Ackerman Stephen B.
Lebentritt Michael S.
Niebling John
Saile George O.
Taiwan Semiconductor Manufacturing Company , Ltd.
LandOfFree
Method of making a semiconductor device having 4 transistor SRAM does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of making a semiconductor device having 4 transistor SRAM, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of making a semiconductor device having 4 transistor SRAM will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1973816