Method of fabricating an oxynitride-capped high dielectric const

Details Method of fabricating an oxynitride-capped high dielectric const Method of fabricating an oxynitride-capped high dielectric const

1997-11-25

2000-02-15

Bowers, Charles

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438287, 438591, H01L 2170

Patent

active

060252286

ABSTRACT:
A method of fabricating an interpolysilicon dielectric structure in a non-volatile memory includes the steps of forming a high dielectric constant layer 12 on a floating gate 10 and an oxynitride layer 14 on the high dielectric constant layer 12. A control gate 18 may be formed on the oxynitride layer 14 to produce a dual gate structure with a high capacitance and therefore a high coupling ratio.

REFERENCES:
patent: 5248629 (1993-09-01), Muroyama
patent: 5290609 (1994-03-01), Horiike
patent: 5663088 (1997-09-01), Sandhu
patent: 5834353 (1998-11-01), Wu
patent: 5876788 (1999-03-01), Bronner
Wolf, Stanley, Silicon Processing for the VLSI Era vol. 2, pp. 274-275, 1990.

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