Method of manufacturing a semiconductor device having MOS transi

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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438234, 438207, H01L 218238, H01L 218249

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active

060252197

ABSTRACT:
There are formed simultaneously a first conductive layer selectively on a region of a semiconductor substrate in which an N-channel MOS transistor is to be formed and on a region of the semiconductor in which a p-channel MOS transistor is to be formed, a second conductive layer on a region of the semiconductor substrate in which a capacitive element is to be formed, and a third conductive layer on a region of the semiconductor substrate in which the resistive element is to be formed. Next, there are formed simultaneously a first insulating film on the lateral side of the first conductive layer, a second insulating film selectively on the second conductive layer, and a third insulating film selectively on the third conductive layer. Then the fourth insulating film is formed on the whole surface. Thereafter there are formed simultaneously a fifth conductive layer on a region of the semiconductor substrate in which a bipolar transistor is to be formed, and a sixth conductive layer on the fourth insulating film on the second conductive layer.

REFERENCES:
patent: 4734382 (1988-03-01), Krishna
patent: 5943564 (1999-08-01), Chen et al.

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