Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1996-05-20
1998-07-14
Bowers, Jr., Charles L.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438766, 438764, 438918, 438966, 438162, 438165, 438491, 438528, 438532, 438659, H01L 21336
Patent
active
057803471
ABSTRACT:
A method and apparatus of forming local interconnects in a MOS process deposits a layer of polysilicon over an entire region after several conventional MOS processing steps. The region is then masked to provide protected regions and unprotected regions. The mask may be used to define local interconnects and other conductive elements such as the source and drain contact regions for a MOS transistor. After masking, the region is bombarded with atoms to enhance the oxidation potential of the unprotected regions. The masking is removed and the substrate is then exposed to oxidizing conditions which cause the unprotected regions to rapidly oxidize to form a thick oxide layer. The formerly protected polysilicon regions may then be doped to render them conductive. The method reduces the number of steps required for formation of local interconnects, permits self-planarization, and avoids excessive etching of polysilicon during the formation of the various conductive regions in a structure that includes source and drain electrodes and local interconnects within the commonly-prepared layer of conductive polysilicon.
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Bowers Jr. Charles L.
Gurley Lynne A.
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