Decoder circuit using redundancy signal having a short pulse for

Details Decoder circuit using redundancy signal having a short pulse for Decoder circuit using redundancy signal having a short pulse for

1997-10-30

1999-05-04

Dinh, Son T.

Static information storage and retrieval

Addressing

Particular decoder or driver circuit

365200, 365233, G11C 800

Patent

active

059011068

ABSTRACT:
Disclosed is a decoder circuit including: a redundancy section row decoder for responding a redundancy main word line signal, thereby selecting a redundancy section word line; a normal section row decoder for receiving a redundancy signal and a normal main word line signal applied from a row redundancy address decoder, thereby selecting a section word line; and, a row redundancy address decoder for generating a signal having a pulse width up to before a next cycle following a redundancy cycle as a redundancy signal, thereby providing the signal to the normal section row decoder and providing the redundancy main word line signal to the redundancy section row decoder during the redundancy cycle, in response to a clock transiting in the redundancy cycle.

REFERENCES:
patent: 5383156 (1995-01-01), Komatsu
patent: 5469388 (1995-11-01), Park
patent: 5528540 (1996-06-01), Shibata et al.

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