Semiconductor storage device

Static information storage and retrieval – Addressing – Multiple port access

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36523003, G11C 800

Patent

active

057744106

ABSTRACT:
It is an object to obtain a semiconductor storage device with two-port structure enabling reduction in circuit area. A crossbar switch CBS.sub.-- i (i=1-5) outputs a control signal for a zeroth port PORT.sub.-- 0 from an output portion CS.sub.-- i0 and outputs a control signal for a first port PORT.sub.-- 1 from an output portion CS.sub.-- i1 when a port exchange signal PSEL is at an L level, and outputs a control signal for the zeroth port PORT.sub.-- 0 from the output portion CS.sub.-- i1 and outputs a control signal for the first port PORT.sub.-- 1 from the output portion CS.sub.-- i0 when the port exchange signal PSEL is at an H level, thereby performing a port switching operation.

REFERENCES:
patent: 5574687 (1996-11-01), Nakase
1993 IEEE International Solid-State Circuits Conference, pp. 250-251, 1993, Katsuro Sasaki, et al., "A 16MB CMOS SRAM With A 2.3 .mu.m.sup.2 Single-Bit Line Memory Cell".
1993 IEEE International Solid-State Circuits Conference, pp. 252-253, 1993, Motomu Ukita, et al., "Single Bitline Cross-Point Cell Activation (SCPA) Architecture for Ultra Low Power SRAMS".
1991 IEEE Custom Integrated Circuits Conference, pp. 3.4.1-3.4.4., 1991, Satoshi Shinagawa, et al., "A Multi-Speed Digital Cross-Connect Switching VLSI Using New Circuit Techniques in Dual Port RAMS".

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