Method for forming a DRAM having improved capacitor dielectric l

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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438253, 438709, 438723, H01L 218242

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active

060777370

ABSTRACT:
A method of fabricating a DRAM device having nitride/oxide or tantalum pentoxide dielectric layers. The method includes: forming field oxide regions on a substrate to define active regions; forming at each active region a MOSFET comprising a top dielectric layer; forming a contact window in the MOSFET top dielectric layer; generating a doped poly-Si bottom electrode of a capacitor in electrical connection with the MOSFET through the contact window; removing surface oxide of the bottom electrode using both chemical and inductive coupled plasma (ICP) treatments; depositing nitride/oxide dielectric layers or a tantalum pentoxide dielectric layer on the ICP-treated bottom electrode; generating a doped poly-Si top electrode of the capacitor.

REFERENCES:
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patent: 5442585 (1995-08-01), Eguchi et al.
patent: 5741722 (1998-04-01), Lee
patent: 5824158 (1998-10-01), Takeuchi et al.
patent: 5837615 (1998-11-01), Rostoker

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