Method of making scalable tunnel oxide window with no isolation

Details Method of making scalable tunnel oxide window with no isolation Method of making scalable tunnel oxide window with no isolation

1997-03-03

1999-05-18

Chaudhari, Chandra

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438267, 438596, H01L21/8247

Patent

active

059045248

ABSTRACT:
Disclosed is an EEPROM device, and a method of making such a device, which incorporates a self-aligned tunnel window having acceptably low gate capacitance at the tunnel oxide node, and which avoids the defects caused by field oxide induced stresses in the tunnel oxide. The EEPROM of the present invention includes a semiconductor substrate with a doped memory diffusion region. Overlying at least a portion of the memory diffusion is a tunnel oxide. Overlying at least a portion of the tunnel oxide is a floating gate structure including an extension. The tunnel window of the EEPROM of the present invention is defined within at least a portion of the tunnel oxide and having at least two edges defined by the floating gate extension, so that when a defined voltage is applied to the memory diffusion a tunnel current sufficient to change the state of the EEPROM flows between the memory diffusion and the floating gate structure.

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Altera Corporation, "EPM7032 Reliability Information Package", pp. 1-26, No Date.

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