Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-07-10
2000-11-28
Niebling, John F.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438303, 438586, 438595, H01L 218238
Patent
active
061534579
ABSTRACT:
A method of fabricating a self-align-contact is provided. First, a semiconductor substrate is provided on which there are two gates, a source/drain region between the two gates and a first spacer on the sidewalls of each gate. The first spacer is removed. A first dielectric layer and a second dielectric layer are formed on the semiconductor substrate. The first dielectric layer is 200-300 .ANG. thick. The second dielectric layer is patterned. The first dielectric layer is anisotropically etched by using the second dielectric layer as a mask to form a self-align-contact opening between the two gates to expose the source/drain region, and to form a second spacer on the sidewalls of the gate. The width of the second spacer is smaller than the width of the first spacer. Therefore, the exposed area of the source/drain region connected the self-align-contact increases.
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Gurley Lynne
Niebling John F.
United Microelectronics Corp.
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