Method for forming a deep trench capacitor of a DRAM cell

Details Method for forming a deep trench capacitor of a DRAM cell Method for forming a deep trench capacitor of a DRAM cell

1999-04-26

2000-03-14

Thomas, Tom

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438227, H01L 21336

Patent

active

060372087

ABSTRACT:
A method of forming a trench capacitor over a semiconductor substrate comprises the following steps. First, a nitride layer is formed on the substrate. Then, a first oxide layer is formed on the nitride layer. Next, the first oxide layer and the nitride layer are etched to expose a portion of the surface of the substrate. An etching back step is performed to etch the nitride layer to pull back the sidewalls of the nitride layer. Next, the second oxide layer is formed above the first oxide layer, the nitride layer and the substrate. An etching step is done to form the trench structure on the substrate by using the first oxide layer as a mask. Then, a wet etching step is performed to remove the first oxide layer and the second oxide layer. Next, a doping step is done to form the doped region in the trench structure. A dielectric layer is then formed above the doped region. A conducting layer is formed on the dielectric layer, wherein the conducting layer is coupled with a drain.

REFERENCES:
patent: 4921816 (1990-05-01), Ino
patent: 5620912 (1997-04-01), Hwang
patent: 5654218 (1997-08-01), Lee
patent: 5656535 (1997-08-01), Ho et al.
patent: 5712185 (1998-01-01), Tsai et al.

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