Method of making self-aligned silicided MOS transistor with ESD

Details Method of making self-aligned silicided MOS transistor with ESD Method of making self-aligned silicided MOS transistor with ESD

1997-12-23

2000-02-08

Chaudhari, Chandra

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438225, 438655, H01L 218238

Patent

active

060227699

ABSTRACT:
An isolation region is formed in a semiconductor substrate for separating a functional region and a ESD protective region. A gate structure and lightly doped active region is formed. An insulator layer is formed and a portion of the layer is removed for a spacer. A doping is performed using the spacer and gate as a mask. An exposed region located aside the gate is defined in the ESD protective region. A covering layer is formed and a first thermal annealing is performed. A junction diode is also formed. A MOS transistor with self-aligned silicide contacts with an ESD protection improvement is formed. The MOS transistor for the ESD protection in a ESD protective region are formed at the same time with the forming of the NMOS, PMOS, or both kind of transistors in a functional region. The ESD protection effect is raised with a low breakdown junction diode. A lightly doped drain (LDD) structure and an ultra-shallow junction are embedded in the devices. The short channel effect and accompanying hot carrier effect is eliminated. ESD damage from external connections to the integrated circuits are kept from the densely packed devices. The salicide technology with low resistance and capacitance provides high gate switching and operation speed with low RC delay. Integrated circuits with ESD hardness, high circuit operation speed, and low power consumption are provided.

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Ajith Amerasekera et al., Correlating Drain Junction Scaling, Salicide Thickness, and Lateral NPN Behavior, with the ESD/EOS Performance of a 0.25 .mu.m CMOS Process, 1996, pp. 893-896.
Peng-Heng Chang et al., On-Liquid-Phase Deposition of Silicon Dioxide by Boric Acid Addition, Mar. 1997, J. Electrochem. Soc., vol. 144, No. 3, pp. 1144-1149.

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