Stress-free semiconductor leadframe

Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame – With stress relief

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Details

257666, 361813, H01L 2348, H01L 2944, H01L 2952, H01L 2960

Patent

active

053550188

ABSTRACT:
A semiconductor lead frame wherein the chip pad and leads are contained within a separate inner island attached to an outer frame through a plurality of independent connectors spread around the perimeter of the island. Each connector consists of a curved filament capable of compression or expansion, thereby allowing the inner island to undergo some structural deformation without transmitting it to the outer frame. As a result, alignment holes contained in the frame are not affected by mechanical stresses suffered during the molding stage of the packaging operation. Separate alignment apertures may be added to the island portion of the lead frame as additional reference markers for post-molding alignment.

REFERENCES:
patent: 4496965 (1985-01-01), Orcutt et al.
patent: 4803540 (1989-02-01), Moyer et al.
patent: 4870474 (1989-09-01), Karashima

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