Selective exclusion of silicide formation to make polysilicon re

Details Selective exclusion of silicide formation to make polysilicon re Selective exclusion of silicide formation to make polysilicon re

1997-06-30

2000-11-07

Bowers, Charles

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438233, 438592, 438759, H01L 21336

Patent

active

061436135

ABSTRACT:
A technique for processing an integrated circuit is disclosed. This technique includes the formation of a polysilicon resistor without silicide next to a polysilicon transistor gate with silicide. Prior to silicidation, an oxide layer coats both polysilicon structures. A portion of the oxide layer is removed by chemical-mechanical polishing to define a generally planar surface from the remaining oxide layer and reexposed portions of each polysilicon structure. A metal layer is deposited on the surface. The portion of the metal layer over the polysilicon resistor structure is removed through a lithographic procedure. A self-aligned silicidation procedure is performed to form a silicide from the metal remaining over the polysilicon gate structure. The formation of both structures is then completed.

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