Data readout circuit for an MOS transistor array

Details Data readout circuit for an MOS transistor array Data readout circuit for an MOS transistor array

1983-07-29

1986-05-27

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

365203, 365104, G11C 700

Patent

active

045920214

ABSTRACT:
A data readout circuit for an MOS transistor array includes a plurality of data output lines. To each of the data output lines are connected N-channel MOS transistors of a corresponding row group. Each of P-channel data output line selection MOS transistors is connected between each of the data output lines and a data output node. An access time is shortened by controlling the data output line selection MOS transistors to be conductive while the data output lines and the data output node are both in a precharged state.

REFERENCES:
patent: 4204277 (1980-05-01), Kinoshita
patent: 4318014 (1982-03-01), McAlister et al.
patent: 4447893 (1984-05-01), Murakami

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