Semiconductor device mounting structure including lead frame and

Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame – On insulating carrier other than a printed circuit board

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Details

257666, 257672, H01L 2348, H01L 2944, H01L 2982, H01L 2960

Patent

active

052930661

ABSTRACT:
Leads near a die pad of a lead frame for a semiconductor device include terminal leads in a pattern on an insulating resin layer. The inner ends of the terminal leads are connected with gold wires to electrode pads of a semiconductor chip, and the outer ends of the terminal leads are also connected with gold wires to inner lead portions of the leads. Wide ground pads are provided which extend from the inner lead portions to the die pad. Ground electrodes on the semiconductor chip are connected with wires to the ground pads to which the insulating resin layer is bonded.

REFERENCES:
patent: 5057805 (1991-10-01), Kadowaki
patent: 5105257 (1992-04-01), Michii
patent: 5138430 (1992-08-01), Gow, III et al.
patent: 5151771 (1992-09-01), Hiroi et al.
"Breaking Common Sense on Multi-Layer Lead Frames in Plastic Packages", Jun. 1989, pp. 102-109.
"Both An Increase in Power Consumption and Increase in Pins in Resin Encapsulated QFR up to 4W", Sep. 1989, pp. 90-99.
"LSI Makers for the First Time Mount Substrates on Lead Frames", Dec. 1989, pp. 40-49.

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