Read/write memory having a multiple column select mode

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch

Patent

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Details

365230, G11C 1140, G11C 1300

Patent

active

048071897

ABSTRACT:
A dual-port memory having a special operating mode (i.e., a block write mode) by which a plurality of memory cells may be written with the same data in a single write cycle is disclosed. The special mode is enabled by a special function pin in conjunction with the write enable and transfer enable function pins, each of which have their logic state latched in during the row address strobe signal. The column decoder in this device is in two stages, where the first stage selects a group of columns based upon the most significant column address bits. The second stage selects a single column based upon the least significant column address bits. In the block write mode, the result of the second column address decoder stage is ignored, and another set of signals select one, more than one, or all of the columns in the group for connection to the input/output circuitry, so that the same data is written to a plurality of memory locations within a certain column address proximity. The invention may be incorporated into a multiple input/output RAM, so that a plurality of columns, associated with a plurality of inputs, may be written in the same cycle. A color register is also provided to store the data to be written, so that the input terminals can be used to select which ones of the group of columns are to be written to in the block write mode. In the multiple input/output situation, a mask register may be provided to selectively inhibit the writing of certain ones of the inputs. The invention provides for efficient writing of color data to proximate memory locations, such a feature being especially useful in "filling" an area in a bit-mapped image with a given color code.

REFERENCES:
patent: 4715017 (1987-12-01), Iwahashi

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