Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-05-27
1999-01-12
Dutton, Brian
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438306, H01L 218238, H01L 21336
Patent
active
058588272
ABSTRACT:
A method of manufacturing MOS semiconductor device, is disclosed, in which considerations are given to the influence of threshold value on ion implantation, and the dose of impurity to be ion implanted for forming high impurity concentration regions as source and drain regions is set to a value, at which the threshold value is substantially constant with impurity dose changes (the impurity dose being set to 10.sup.15 per cm.sup.2 or below for n-type impurity region). Thus, it is made possible to adequately set and control the threshold value, thus solving particularly the problem of reverse short channel effect and permitting formation of MOS parts with different threshold values.
REFERENCES:
patent: 4928156 (1990-05-01), Alvis et al.
patent: 5308780 (1994-05-01), Chou et al.
patent: 5320974 (1994-06-01), Hori et al.
patent: 5372957 (1994-12-01), Liang et al.
patent: 5432114 (1995-07-01), O
patent: 5472887 (1995-12-01), Hutter et al.
Stanley Wolf, Silicon Processing for the VLSI Era, vol. 3, 226-232, 1995.
Dutton Brian
Sony Corporation
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