Semiconductor storage unit with I/O bus precharging and equaliza

Details Semiconductor storage unit with I/O bus precharging and equaliza Semiconductor storage unit with I/O bus precharging and equaliza

1985-09-10

1988-01-26

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

Precharge

365233, 365189, 365230, G11C 700, G11C 1300, G11C 1140

Patent

active

047220740

ABSTRACT:
A first precharging and equalizing circuit (7) precharges and equalizes I/O buses (10 and 10') in advance to selection of bit lines, and following thereto, a second precharging and equalizing circuit (12) precharges and equalizes the I/O buses (10 and 10') during driving operation of a sense amplifier (2). Thus, potential levels of the I/O Buses (10 and 10') are prevented from being changed by vibration of the output level of the sense amplifier (2) transmitted to the I/O buses (10 and 10') through parasitic capacitance (8) during driving operation of the sense amplifier (2).

REFERENCES:
patent: 4125878 (1978-11-01), Watanabe
patent: 4138740 (1979-02-01), Itoh
patent: 4417329 (1983-11-01), Mezawa et al.
patent: 4449207 (1984-05-01), Kung et al.
patent: 4458337 (1984-07-01), Takemae et al.
patent: 4475178 (1984-10-01), Kinoshita
patent: 4503522 (1985-03-01), Etoh et al.

Affiliated with

Also associated with

Rating

Semiconductor storage unit with I/O bus precharging and equaliza does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor storage unit with I/O bus precharging and equaliza, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor storage unit with I/O bus precharging and equaliza will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1471956