Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent
1982-11-05
1985-04-16
Fears, Terrell W.
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
365230, G11C 1140
Patent
active
045119970
ABSTRACT:
A metal-insulator semiconductor dynamic memory device including sense amplifiers arrayed on a semiconductor substrate and divided into a plurality of sense amplifier groups. Column decoders are provided, one decoder for each sense amplifier group, each sense amplifier group being selected by the column decoder. One or more control signal lines for simultaneously selecting the output signals of at least two sense amplifiers in the sense amplifier group selected by the column decoder, a plurality of data buses for transferring the output signals of at least two sense amplifiers selected by one or more control signal lines, are included in the memory device. All of the sense amplifiers have the control signal lines and the data buses in common.
REFERENCES:
patent: 3402398 (1968-09-01), Koerner et al.
patent: 4330852 (1982-05-01), Redwine et al.
Nakano Tomio
Nozaki Shigeki
Takemae Yoshihiro
Fears Terrell W.
Fujitsu Limited
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