Method of reducing substrate losses in inductor

Details Method of reducing substrate losses in inductor Method of reducing substrate losses in inductor

1998-07-09

1999-06-29

Monin, Jr., Donald L.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

257501, 257531, 336200, 336232, 438243, 438359, H01L 2972, H01L 2176

Patent

active

059181214

ABSTRACT:
A method for making planar silicon-based inductor structure with improved Q is disclosed. This method includes the steps of: (a) providing a lightly-doped P-type substrate as a starting wafer; (b) forming a preliminary oxide layer on the lightly-doped P-type substrate; (c) forming a first oxide layer from the preliminary oxide layer enclosing a predetermined epitaxial area; (d) depositing an epitaxial layer in the epitaxial area using intrinsic doping; (e) forming a second oxide layer which covers both the epitaxial layer and the first oxide layer, and is merged with the first oxide layer to thus form a contiguous inter-connected inductor oxide layer; (f) forming a metal line according to a planar inductor pattern so as to form a silicon-based inductor structure. The epitaxial layer has a resistivity of at least 2 K ohm-cm. The planar silicon-based inductor improves the Q value by reducing or stopping current losses into the substrate.

REFERENCES:
patent: 5283462 (1994-02-01), Stengel
patent: 5767563 (1998-06-01), Imam et al.
patent: 5805043 (1998-09-01), Bahl
patent: 5844299 (1998-12-01), Merrill et al.

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