Method of manufacturing silicide contacts for CMOS devices

Details Method of manufacturing silicide contacts for CMOS devices Method of manufacturing silicide contacts for CMOS devices

1981-05-29

1983-02-22

Massie, Jerome W.

Adhesive bonding and miscellaneous chemical manufacture

Delaminating processes adapted for specified product

Delaminating in preparation for post processing recycling step

29571, 29591, 156643, 156657, 357 59, 357 67, H01L 21308, H01L 2124, H01L 21283

Patent

active

043747000

ABSTRACT:
In the manufacture of a CMOS device, oxide is etched away from polysilicon gate-level interconnects, and from source or drain regions of either conductivity type to which the polysilicon gate-level interconnect is desired to be connected. A metal is then deposited, and silicide is formed to connect the gate-level interconnect to the respective source and drain regions. To ensure continuity of the silicide connection, the gate oxide beneath the gate level interconnect is slightly undercut by a wet etching process, additional polysilicon is deposited conformally overall, and the additional polysilicon is anistropically etched so that it is removed from all areas except those within the undercut region beneath the gate-level interconnect thus a continuous surface of silicon, from which a continuous layer of silicide is then grown, exists between the polysilicon gate-level interconnect and the respective source and drain regions. Thus, self-aligned contacts are created, and no unwanted pn junctions are created.

REFERENCES:
patent: 4033797 (1977-07-01), Dill et al.
patent: 4319395 (1982-03-01), Lund et al.
patent: 4332839 (1982-06-01), Levinstein et al.
Rideout, "Method . . . Lines", IBM Technical Disclosure Bull., vol. 23, No. 6, (11/80), pp. 2563-2566.
De La Moneda, "Self-Aligned . . . Contacts", IBM Technical Discl. Bull., vol. 24, No. 7a, (12/81), pp. 3454-3457.
Tsang, "Forming . . . Barrier", IBM Technical Disclosure Bull., vol. 19, No. 9, (2/77), pp. 3383-3385.
Jambotkar, "Realization . . . Structure", IBM Technical Discl. Bull., vol. 24, No. 7b, (12/81), pp. 3847-3851.

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