Method of fabricating EEPROM using oblique implantation

Details Method of fabricating EEPROM using oblique implantation Method of fabricating EEPROM using oblique implantation

1996-09-03

1999-04-06

Chaudhari, Chandra

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438286, 438302, H01L 218247

Patent

active

058917748

ABSTRACT:
A semiconductor memory device is provided which comprises: a plurality of memory cell transistors each having a tunnel oxide film formed on a semiconductor substrate of a first conductivity type, a floating gate formed on the tunnel oxide film, a control gate overlaid on the floating gate with intervention of an insulating film, source/drain regions of a second conductivity type formed in the semiconductor substrate, and a high-concentration impurity layer of the first conductivity type formed in a portion adjacent to the drain region below the floating gate by oblique ion implantation employing an implantation angle .theta. with respect to a normal line to the semiconductor substrate; the plurality of memory cell transistors each sharing a source region with a memory cell transistor disposed adjacent thereto on one side thereof and a drain region with a memory cell transistor disposed adjacent thereto on the other side thereof; the implantation angle .theta. being defined by the following expression:

REFERENCES:
patent: 5147811 (1992-09-01), Sakagami
patent: 5190887 (1993-03-01), Tang et al.
patent: 5316961 (1994-05-01), Okazawa
patent: 5355006 (1994-10-01), Iguchi

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