IGBT with reduced forward voltage drop and reduced switching los

Details IGBT with reduced forward voltage drop and reduced switching los IGBT with reduced forward voltage drop and reduced switching los

1997-07-18

2000-03-28

Monin, Jr., Donald L.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Gettering of semiconductor substrate

438234, 438473, 438310, 438543, 257558, 257616, 257617, H01L 218232

Patent

active

060431121

ABSTRACT:
The boundary between the P type silicon base and N.sup.+ buffer layer of an IGBT is intentionally damaged, as by a germanium implant, to create well defined and located damage sites for reducing lifetime in the silicon.

REFERENCES:
patent: 5250445 (1993-10-01), Bean et al.
patent: 5766966 (1998-06-01), Ng
Z. Radzimski et al., Minority-Carrier Lifetime Analysis of Silicon Epitaxy and Bulk Crystals with Nonuniformly Distributed Defects, IEEE Trans. Electronic, Div. ED-35, 80 (Jan. 1988) pp. 80-84.
S. Wolf et al., Silicon Processing, vol. 1, (1986), Lattice Press, pp. 295-303.

Affiliated with

Also associated with

Rating

IGBT with reduced forward voltage drop and reduced switching los does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with IGBT with reduced forward voltage drop and reduced switching los, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and IGBT with reduced forward voltage drop and reduced switching los will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1325471