Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1996-05-06
1999-11-16
Niebling, John F.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438263, 438276, 438278, 438594, H01L 21336
Patent
active
059857170
ABSTRACT:
Disclosed is a method of fabricating memory devices. By the method, a silicon nitride layer is used as a mask to form oxide layers on the lateral sides of the word lines through high-temperature heat treatment as source/drain annealing or oxidation. An etching process is subsequently used to remove the silicon nitride layer so as to expose the polysilicon layer on the word lines. After that, metal, preferably aluminum, is selectively grown the exposed polysilicon layer, which allows the resistance of the word lines to be significantly lowered thereby increasing access speed of the memory device.
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Gurley Lynne A.
Niebling John F.
United Microelectronics Corp.
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