Crown capacitor using a tapered etch of a damascene lower electr

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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438240, 438396, H01L 218242

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active

058799850

ABSTRACT:
A structure and process for fabricating a crown capacitor using a tapered etch and chemical mechanical polishing to form a bottom electrode having an increased area and crown is provided. The tapered etch is used to form a trough in an interlevel dielectric, e.g. SiO.sub.2, and is performed over contact hole forming a crown-like structure. The trough and, optionally, the crown are then covered by a conductor, which is patterned by chemical mechanical polishing.

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Toru Kaga, et al. .Crown-Shaped Stacked-Capacitor Cell for 1.5-V Operation 64-Mb DRAM's., IEEE Transactions on Electron Devices, vol. 38, No. 2, Feb. 1991, pp. 255-260.

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