Semiconductor memory incorporating a plurality of data input buf

Details Semiconductor memory incorporating a plurality of data input buf Semiconductor memory incorporating a plurality of data input buf

1994-03-04

1995-06-13

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

36518907, 365190, 365201, 365205, 365220, G11C 700

Patent

active

054249848

ABSTRACT:
A read-write semiconductor memory comprises a first data input buffer which takes in external data and which has a pair of signal output nodes for outputting a pair of signals corresponding to the taken-in data, a pair of signal lines connected to a pair of signal output nodes of the first data input buffer, and second data input buffers which are connected to the pair of signal lines and which have internal data set according to the signals on the pair of signal lines.

REFERENCES:
patent: 4669064 (1987-05-01), Ishimoto
patent: 4794567 (1988-12-01), Akatsuka
patent: 4937479 (1990-06-01), Hoshi
patent: 5134583 (1992-07-01), Matsuo et al.
patent: 5204841 (1993-04-01), Chappell et al.
patent: 5323346 (1994-06-01), Takahashi

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