Sloped spacer for mos field effect devices

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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Details

257900, 257408, H01L 2910, H01L 2978

Patent

active

054245710

ABSTRACT:
A method for forming field effect devices having lightly doped drain regions requires only a single dope and implant step. After patterning of the polycrystalline silicon gates, sloped sidewall spacers are formed alongside the gates. These spacers have a relatively linear slope from the top corners of the polycrystalline silicon gates to the substrate. A single implant of dopant results in heavily doped regions beyond the sidewall spacers with more lightly, and shallowly, doped regions next to the channel.

REFERENCES:
patent: 4755479 (1988-07-01), Miura
patent: 4872041 (1989-10-01), Sugiura et al.

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